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Table 16. Y-Axis Positive Arming Window Size Definitions (Moving Average Mode)
AWS_YP[1]
0
0
1
1
AWS_YP[0]
0
1
0
1
Y-Axis Positive Window Size
2
4
8
16
Table 17. Y-Axis Negative Arming Window Size Definitions (Moving Average Mode)
AWS_YN[1]
0
0
1
1
AWS_YN[0]
0
1
0
1
Y-Axis Negative Window Size
2
4
8
16
Table 18. Arming Count Limit Definitions (Count Mode)
AWS_XN[1]
Don’t Care
Don’t Care
Don’t Care
Don’t Care
AWS_XN[0]
Don’t Care
Don’t Care
Don’t Care
Don’t Care
AWS_XP[1]
0
0
1
1
AWS_XP[0]
0
1
0
1
X-Axis Sample Count Limit
1
3
7
15
Table 19. Arming Count Limit Definitions (Count Mode)
AWS_YN[1]
Don’t Care
Don’t Care
Don’t Care
Don’t Care
AWS_YN[0]
Don’t Care
Don’t Care
Don’t Care
Don’t Care
AWS_YP[1]
0
0
1
1
AWS_YP[0]
0
1
0
1
Y-Axis Sample Count Limit
1
3
7
15
3.1.10
Arming Threshold Registers (ARMT_XP, ARMT_XN, ARMT_YP, ARMT_YN)
The arming threshold registers contain the X-axis and Y-axis positive and negative thresholds to be used by the arming func-
tion. Refer to Section 3.8.10 for more details regarding the arming function.
The arming threshold registers can be written during initialization but are locked once the ENDINIT bit is set. Refer to
Section 3.1.6.3 . The arming threshold registers are included in the writable register CRC check. Refer to Section 3.2.2 for details.
Table 20. Arming Threshold Registers
Location
Bit
Address
$10
$11
$12
$13
Register
ARMT_XP
ARMT_YP
ARMT_XN
ARMT_YN
7
AT_XP[7]
AT_YP[7]
AT_XN[7]
AT_YN[7]
6
AT_XP[6]
AT_YP[6]
AT_XN[6]
AT_YN[6]
5
AT_XP[5]
AT_YP[5]
AT_XN[5]
AT_YN[5]
4
AT_XP[4]
AT_YP[4]
AT_XN[4]
AT_YN[4]
3
AT_XP[3]
AT_YP[3]
AT_XN[3]
AT_YN[3]
2
AT_XP[2]
AT_YP[2]
AT_XN[2]
AT_YN[2]
1
AT_XP[1]
AT_YP[1]
AT_XN[1]
AT_YN[1]
0
AT_XP[0]
AT_YP[0]
AT_XN[0]
AT_YN[0]
Reset Value
0
0
0
0
0
0
0
0
MMA65xx
Sensor
Freescale Semiconductor, Inc.
19
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